; []===========================================================[] ; ; NOTICE: THIS PROGRAM BELONGS TO AWARD SOFTWARE INTERNATIONAL(R) ; INC. IT IS CONSIDERED A TRADE SECRET AND IS NOT TO BE ; DIVULGED OR USED BY PARTIES WHO HAVE NOT RECEIVED ; WRITTEN AUTHORIZATION FROM THE OWNER. ; ; []===========================================================[] ; ;---------------------------------------------------------------------------- ;Rev Date Name Description ;---------------------------------------------------------------------------- ;R27 04/21/99 PAL Added Public Prg_ClkGen_Chip ;R26 04/07/99 TNY Rewrite ICH SMBus block write(add time-out service). ;R25 03/05/99 TNY Add ICH SMBus block mode programming. ;R24 02/05/99 RIC Fix that some mainboard will hang when BIOS control ; clock generator signal from Disabled to Enabled. ; So we must to do second RESET. ; Definition: Reset_After_Early_Prg_ClkGen EQU 1 ; RESET_CLK_CMOS EQU CMOS_Loc ;R23 02/04/99 PAL Fix PCI_Clk_Val location error ;R22 01/30/99 PAL Move "Check_ClkGen_Byte_RW" to all clock.gen file and ; added extrn definition ;R21 01/29/99 PAL Move "SndChip_Cntl_USE_ClkGen" from CHIPPOST.ASM ;R20 01/27/99 PAL Added "Set_Default_Value" option to reduce code ;R19 01/26/99 LAW added Check_insert_Key_Press hook for bypass Clock GEN ; Setting ;R18 01/21/99 AVN Added SiS5595 B version hardware SMBus support. ;R17 01/14/99 PAL Added RTM_Turbo_Freq hook for e0post.asm in order to ; avoid show freq. error in POST ;R16 01/08/99 PAL Added RTM_CLOCKGEN definition for Real Tek clockgen ;R15 12/19/98 RCH The bit 6 (InUse status) of SMBus host status register ; is always "high" in Intel/ICH A0 revision. Don't check ; this bit while programming I2C devices. ;R14 12/18/98 RCH Fixed compilation error if "SMBus_Port_HiByte" is ; not defined in BIOS.CFG for PIIX platform ;R13 09/03/98 LAW Fixed ALi M1543/M1543C with Ali M1621 cann't Work ;R12 07/07/98 PAL Fix Disable_ClkGen_For_VT586B error for Winbond ;R11 07/06/98 PAL Fix Disable_ClkGen_For_SISSMBus error for Winbond ;R10 06/19/98 RIC Add VIA SMBus Support. ;R09 06/02/98 LAW when using CLOCK GEN with GL518 work not fine on M1543 ;R08 03/20/98 RAY Public Prepare_ClkGen_Val ;R07 03/16/98 RAY Move CLKCNTL_KERNEL definitions to CLTCNTL.DEF which ; will be included in COMMON.EQU ;R06 02/17/98 TNY Add "Early_Init_Onboard_Generator" hook on post_8s ; to support snd-chip enabled/disabled by clk-gen. ;R05A 12/03/97 RCH Fixed compilation error if programmer modify BIOS.CFG ; in local drive. ;R05 11/14/97 DNL Rename all clock generator file as clock.gen ;R01A 10/16/97 RIC Fixed that R01 code work in vain. ;R04 10/14/97 RCH Added alias name for ICWORK series clock generator ; for new kernel. ;R03 10/09/97 JSN Fix compilation error ;R02 10/03/97 RAY Fix compilation error: ; ; DO NOT write your code like this: ; ; "mov si, offset EGROUP:Boost_Val" ; "F000_call DGROUP:E000_64K_shadow_RW" ; ; USE "mov si, offset Boost_Val" ; "F000_call E000_64K_shadow_RW" instead ; ;R01 10/03/97 RIC Support Clock Generator of VIA Software I2C. ;R00 10/01/97 TNY Init. Ver. ifdef MASM611 .MODEL SMALL,BASIC OPTION PROC: PRIVATE endif ;MASM611 .386p PAGE 56,132 TITLE CLKCNTL.ASM .XLIST INCLUDE BIOS.CFG INCLUDE COMMON.MAC INCLUDE POST.EQU extrn F000_call_proc:near extrn F000_GetItem_Value:near extrn GetItem_Value:near extrn E000_64K_shadow_RW:near ;R02 extrn E000_64K_shadow_R:near ;R02 ifdef Reset_After_Early_Prg_ClkGen ;R24 extrn Issue_System_Reset:Near ;R24 endif; Reset_After_Early_Prg_ClkGen ;R24 ;R19 - start ifdef Jumpless_Support ifdef POWER_ON_PRESS_SPECIAL_KEY_INTO_SETUP_SUPPORT extrn Check_insert_Key_Press:near extrn Make_Into_Setup_Flag:near endif; POWER_ON_PRESS_SPECIAL_KEY_INTO_SETUP_SUPPORT endif; Jumpless_Support ;R19 - end ;R07 CLKCNTL_KERNEL = 0 ;R07 ;R07 ;For ICWORK clock generators ;R07 ifdef ICWORK8704_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;ICWORK8704_Support ;R07 ;R07 ifdef ICWORK8803_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;ICWORK8803_Support ;R07 ;R07 ifdef ICWORK6704_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;ICWORK6704_Support ;R07 ;R07 ;R04 - start ;R07 ifdef ICW8727_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;ICW8727_Support ;R07 ;R07 ifdef ICW8704_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;ICW8704_Support ;R07 ;R07 ifdef ICW8803_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;ICW8803_Support ;R07 ;R07 ifdef ICW6704_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;ICW6704_Support ;R07 ;R07 ifdef ICW8772_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;ICW8772_Support ;R07 ;R04 - end ;R07 ;R07 ifdef KS8448_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;KS8448_Support ;R07 ;R07 ifdef CY2275_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif; CY2275_Support ;R07 ;R07 ifdef CY2283_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif; CY2283_Support ;R07 ;R07 ifdef CY2318NZ_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif; CY2318NZ_Support ;R07 ;R07 ifdef PL526618_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif; PL526618_Support ;R07 ;R07 ifdef PL526609_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif; PL526609_Support ;R07 ;R07 ifdef PL526619_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif; PL526619_Support ;R07 ;R07 ifdef PL526425_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif; PL526425_Support ;R07 ;R07 ifdef ICW6801_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;ICW6801_Support ;R07 ;R07 ifdef ICW10104_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;ICW10104_Support ;R07 ;R07 ifdef ICW11114_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;ICW11114_Support ;R07 ;R07 ;For IMI clock generators ;R07 ;R07 ifdef IMI743_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;IMI743_Support ;R07 ;R07 ifdef IMI643_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;IMI643_Support ;R07 ;R07 ifdef IMI543_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;IMI543_Support ;R07 ;R07 ifdef IMI671_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;IMI671_Support ;R07 ;R07 ifdef IMI584_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;IMI584_Support ;R07 ;R07 ;For ICS clock generators ;R07 ifdef ICS4833_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;ICS4833_Support ;R07 ;R07 ifdef ICS4826_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;ICS4826_Support ;R07 ;R07 ifdef ICS4837_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;ICS4837_Support ;R07 ;R07 ifdef ICS9148_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;ICS9148_Support ;R07 ;R07 ifdef ICS9150_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;ICS9150_Support ;R07 ;R07 ifdef ICS9179_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif ;ICS9179_Support ;R07 ;R07 ifdef PL526502_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif; PL526502_Support ;R07 ;R07 ifdef PL526601_Support ;R07 CLKCNTL_KERNEL = 1 ;R07 endif; PL526601_Support G_RAM SEGMENT USE16 AT 0 ORG 04H*4 INCLUDE SEG_0.INC ORG 400H INCLUDE G_RAM.INC G_RAM ENDS .LIST DGROUP GROUP FCODE FCODE SEGMENT PARA PUBLIC 'CODE' ASSUME CS:DGROUP FCODE ENDS EGROUP GROUP ECODE ECODE SEGMENT USE16 PARA PUBLIC 'ECODE' ASSUME CS:EGROUP,DS:G_RAM,ES:EGROUP ;[]======================================================================[] ;[]======================================================================[] Public Init_Onboard_Generator Init_Onboard_Generator Proc Near IF CLKCNTL_KERNEL pushad push ds push es pushf ;R02 push 0e000h push cs ;R02 pop ds ;R02 extrn E000_64K_shadow_RW:near ;R02 extrn E000_64K_shadow_R:near ;R02 f000_call DGROUP:E000_64K_shadow_RW f000_call E000_64K_shadow_RW ;R02 ;R21 - start call Check_Device_Item ;R21 - end call Prepare_ClkGen_Val ;R02 f000_call DGROUP:E000_64K_shadow_R f000_call E000_64K_shadow_R ;R02 call Prg_ClkGen_Chip ;R16 - start ifdef RTM_CLOCKGEN call Check_ClkGen_Byte_RW jne short Block_Access call Set_Default_Value ;R20 ;R20;R17 - start ;R20 mov ah, 078h ;R20 mov cx,0d211h ;Index 11h ;R20 call Ct_I2CWriteWord ;R20 Newiodelay ;R20 Newiodelay ;R20 mov cx,0d212h ;Index 12h ;R20 mov ah,0ch ;set N data 15 ;R20 call Ct_I2CWriteWord ;R20 Newiodelay ;R20 Newiodelay ;R20 ;R20 mov cx,0d21fh ;Index 1fh ;R20 xor ax, ax ;set command ;R20 call Ct_I2CWriteWord ;R20 Newiodelay ;R20 Newiodelay ;R17 - end ;R17 call Set_Turbo_Freq ;R17 jmp short Byte_Access Block_Access: ;R17 push ds ;R17 mov ax,0f000h ;R17 mov ds,ax ;R17 assume ds:DGROUP ;R17 f000_call DGROUP:F000_Shadow_W ;R17 or word ptr ds:[Turbo_Freq_Item ].ITEMSTAT,ITEMDISABLE ;R17 f000_call DGROUP:F000_Shadow_R ;R17 pop ds ;R17 Byte_Access: endif; RTM_CLOCKGEN ;R16 - end popf pop es pop ds popad ENDIF ;CLKCNTL_KERNEL ret Init_Onboard_Generator Endp ;R21 - start IF CLKCNTL_KERNEL Check_Device_Item Proc near ;R23 mov di, offset PCI_Clk_Val ifdef SndChip_Cntl_USE_ClkGen mov di, offset PCI_Clk_Val ;R23 extrn SndChip_Item:near mov si,offset DGROUP:SndChip_Item call F000_GetItem_Value or al,al jz short @F and byte ptr cs:[di], not SndChip_Cntl_USE_ClkGen @@: endif; SndChip_Cntl_USE_ClkGen ifdef LanChip_Cntl_USE_ClkGen mov di, offset PCI_Clk_Val ;R23 extrn LanChip_Item:near mov si,offset DGROUP:LanChip_Item call F000_GetItem_Value or al,al jz short @F and byte ptr cs:[di], not LanChip_Cntl_USE_ClkGen @@: endif; LanChip_Cntl_USE_ClkGen ret Check_Device_Item ENDP ENDIF; CLKCNTL_KERNEL ;R21 - end ;R17 - start ifdef RTM_CLOCKGEN Public RTM_Turbo_Freq RTM_Turbo_Freq proc near call Check_ClkGen_Byte_RW jne short Block_Access call Set_Turbo_Freq jmp short Byte_Access Block_Access: push ds mov ax,0f000h mov ds,ax assume ds:DGROUP extrn F000_Shadow_W:near ;R22 extrn F000_Shadow_R:near ;R22 f000_call DGROUP:F000_Shadow_W or word ptr ds:[Turbo_Freq_Item ].ITEMSTAT,ITEMDISABLE f000_call DGROUP:F000_Shadow_R pop ds Byte_Access: ret RTM_Turbo_Freq ENDP endif; RTM_CLOCKGEN ;R17 - end ;R06 - start ifdef Early_Init_ClkGen Public Early_Init_Onboard_Generator Early_Init_Onboard_Generator Proc Near IF CLKCNTL_KERNEL pushad push ds push es pushf call Prg_ClkGen_Chip ifdef Reset_After_Early_Prg_ClkGen ;R24 call Do_Reset_After_Early_Prg_ClkGen ;R24 endif; Reset_After_Early_Prg_ClkGen ;R24 popf pop es pop ds popad ENDIF ;CLKCNTL_KERNEL ret Early_Init_Onboard_Generator Endp ;R24 - satrts ifdef Reset_After_Early_Prg_ClkGen Do_Reset_After_Early_Prg_ClkGen Proc Near mov al,RESET_CLK_CMOS extrn F000_Get_Cmos:Near extrn F000_Set_Cmos:Near call F000_Get_Cmos cmp al,55h jz _Not_Reset mov al,RESET_CLK_CMOS mov ah,55h call F000_Set_Cmos F000_call Issue_System_Reset jmp short $ _Not_Reset: mov al,RESET_CLK_CMOS mov ah,00h call F000_Set_Cmos ret Do_Reset_After_Early_Prg_ClkGen Endp endif; Reset_After_Early_Prg_ClkGen ;R24 - ends endif; Early_Init_ClkGen ;R06 - end ;R05 ifdef ICWORK8704_Support ;R05 include ICW8704.GEN ;R05 endif ;ICWORK8704_Support ;R05 ;R05 ifdef ICWORK8803_Support ;R05 include ICW8803.GEN ;R05 endif ;ICWORK8803_Support ;R05 ;R05 ifdef ICWORK6704_Support ;R05 include ICW6704.GEN ;R05 endif; ICWORK6704_Support ;R05 ;R05;R04 - start ;R05ifdef ICW8704_Support ;R05 include ICW8704.GEN ;R05endif ;ICW8704_Support ;R05 ;R05ifdef ICW8803_Support ;R05 include ICW8803.GEN ;R05endif ;ICW8803_Support ;R05 ;R05ifdef ICW6704_Support ;R05 include ICW6704.GEN ;R05endif ;ICW6704_Support ;R05;R04 - end ;R05 ;R05 ;R05 ifdef IMI643_Support ;R05 include IMI643.GEN ;R05 endif ;IMI643_Support ;R05 ;R05 ifdef IMI543_Support ;R05 include IMI543.GEN ;R05 endif ;IMI543_Support ;R05 ;R05 ifdef IMI671_Support ;R05 include IMI671.GEN ;R05 endif ;IMI671_Support ;R05 ;R05 ifdef IMI584_Support ;R05 include IMI584.GEN ;R05 endif ;IMI584_Support ;R05 ;R05 ifdef ICS9148_Support ;R05 include ICS9148.GEN ;R05 endif; ICS9148_Support ;R05 ;R05 ifdef ICS9150_Support ;R05 include ICS9150.GEN ;R05 endif; ICS9150_Support ;R05 ;R05 ifdef PL526502_Support ;R05 include PL526502.GEN ;R05 endif; PL526502_Support ;R05 - start IF CLKCNTL_KERNEL ;R05A Public Prepare_ClkGen_Val ;R08 include CLOCK.GEN endif; CLKCNTL_KERNEL ;R05A ;R05 - end IF CLKCNTL_KERNEL SIS_SMBus = 0 ifdef SIS_5598_PCI_RESET SIS_SMBus = 1 endif; SIS_5598_PCI_RESET ifdef SIS5595_ID SIS_SMBus = 1 endif; SIS5595_ID VIA_SMBus = 0 ;R10 ifdef VT596 ;R10 IFDEF SMBus_Port ;R10 VIA_SMBus = 1 ;R10 ENDIF;SMBus_Port ;R10 endif; VT596 ;R10 ;R22;R16 - start ;R22ifdef RTM_CLOCKGEN ;R22Check_ClkGen_Byte_RW Proc near ;R22 extrn Ct_I2CReadWord:near ;R22 mov ch, 0D2h ;Device ID ;R22 mov cl, 10h ;Index ;R22 call Ct_I2CReadWord ;R22 cmp ah, 3 ;3 byte read write ;R22 ret ;R22Check_ClkGen_Byte_RW Endp ;R22endif; RTM_CLOCKGEN ;R22;R16 - end Public Prg_ClkGen_Chip ;R27 Prg_ClkGen_Chip Proc Near ifdef PIIX_ID call Disable_ClkGen_For_PIIX4 endif; PIIX_ID ifdef M1543 ;R19 - start ifdef Jumpless_Support ifdef POWER_ON_PRESS_SPECIAL_KEY_INTO_SETUP_SUPPORT call Check_insert_Key_Press jnc short do_into_setup endif; POWER_ON_PRESS_SPECIAL_KEY_INTO_SETUP_SUPPORT endif; Jumpless_Support ;R19 - end call Disable_ClkGen_For_M1543 do_into_setup: ;R19 endif; M1543 ifdef VT586_ACPI ;R01 IF VIA_SMBus EQ 0 ;R10 call Disable_ClkGen_For_VT586B ;R01 VIA 586B SouthBridge ENDIF; VIA_SMBus EQ 0 ;R10 endif; VT586_ACPI ;R01 if VIA_SMBus ;R10 call Disable_ClkGen_For_VT596 ;R10 VIA 596 SouthBridge endif; VIA_SMBus ;R10 if SIS_SMBus call Disable_ClkGen_For_SISSMBus endif; SIS_SMBus ret Prg_ClkGen_Chip Endp ifdef PIIX_ID Disable_ClkGen_For_PIIX4 Proc near ;R25 - start ifdef ICH ;Send SMbus block write for ICH platforms (i820,i810/815,i840) ;R26 mov dx,SMBus_Port + 00h ;R26Chk_Status0: ;R26 in al,dx ;get status ;R26 out dx,al ;R26 and al,NOT 40H ;don't check INUSE bit ;R26 or al,al ;R26 jnz short Chk_Status0 ;R26 - start mov cx,800h mov dx,SMBus_Port + 00h Chk_Status0: in al,dx ;get status newiodelay newiodelay out dx,al and al,NOT 40H ;don't check INUSE bit or al,al jz short @F loop short Chk_Status0 @@: ;R26 - end mov dx,SMBus_Port + 04h mov al,0d2h ;ID (write) out dx,al ;Program first data. mov si,offset Prg_ClkGen_Num mov dx,SMBus_Port + 05H mov al,cs:[si] out dx,al mov dx,SMBus_Port + 07H ;Program block num. mov si,offset Prg_ClkGen_Tbl mov al,cs:[si] out dx,al mov dx,SMBus_Port + 03H mov al,0 out dx,al ;Start send. mov dx,SMBus_Port + 02H mov al,54h out dx,al ;R26;;Program block data ;R26 PrgBlock: ;R26 mov cx, 0fffh ;wait for for SMbus ready ;R26 ck: ;to patch ICH bug. ;R26 newiodelay ;R26 loop ck ;R26 ;R26 mov dx,SMBus_Port + 00H ;R26 in al,dx ;R26 NEWIODELAY ;R26 ;R26; out 80h, al ;R26 ;R26 mov dx,SMBus_Port + 00H ;R26 in al,dx ;R26 test al,80h ;ready for next byte ? ;R26 jz short PrgBlock ;R26 inc si ;R26 cmp si,offset Prg_ClkGen_Tbl_End ;R26 je short PrgBlockEnd ;R26 ;R26 mov dx,SMBus_Port + 00H ;R26 mov al, 80H ;R26 out dx,al ;R26 ;R26 mov dx,SMBus_Port + 07H ;R26 mov al,cs:[si] ;R26 out dx,al ;R26 ;R26 jmp PrgBlock ;R26 - start ;;Program block data PrgBlkStart: mov cx,40h PrgBlock: push cx mov cx, 400h ;wait for for SMbus ready ck: ;to patch ICH bug. newiodelay loop short ck pop cx mov dx,SMBus_Port + 00H in al,dx NEWIODELAY out dx,al NEWIODELAY test al,80h ;ready for next byte ? jnz short @F loop short PrgBlock @@: inc si cmp si,offset Prg_ClkGen_Tbl_End je short PrgBlockEnd mov dx,SMBus_Port + 07H mov al,cs:[si] out dx,al NEWIODELAY jmp PrgBlkStart ;R26 - end PrgBlockEnd: else; ICH ;R25 - end mov dx,SMBus_Port + 04h mov al,0d2h ;ID (write) out dx,al NEWIODELAY NEWIODELAY mov dx,SMBus_Port + 00h Chk_Status0: in al,dx ;get status NEWIODELAY out dx,al NEWIODELAY and al,NOT 40H ;don't check INUSE bit ;R15 or al,al jnz short Chk_Status0 mov dx,SMBus_Port + 02h in al,dx ;reset pointer NEWIODELAY NEWIODELAY ;Programe block num. ;R02 mov si,offset EGROUP:Prg_ClkGen_Num mov si,offset Prg_ClkGen_Num ;R02 ;R14 mov dh,SMBus_Port_HiByte ;R14 mov dl,05h mov dx,SMBus_Port + 05H ;R14 mov al,cs:[si] out dx,al newiodelay newiodelay ;Programe block data ;R02 mov si,offset EGROUP:Prg_ClkGen_Tbl mov si,offset Prg_ClkGen_Tbl ;R02 mov dx,SMBus_Port + 07H ;R14 ;R14 mov dh,SMBus_Port_HiByte @@: ;R14 mov dl,07h mov al,cs:[si] out dx,al NEWIODELAY NEWIODELAY add si,1 ;R02 cmp si,offset EGROUP:Prg_ClkGen_Tbl_End cmp si,offset Prg_ClkGen_Tbl_End ;R02 jne short @B ;Start send. ;R14 mov dh,SMBus_Port_HiByte ;R14 mov dl,02h mov dx,SMBus_Port + 02H ;R14 mov al,54h out dx,al newiodelay newiodelay xor cx,cx ;loop count mov dx,SMBus_Port + 00h Chk_Status_Final0: in al,dx ;get status NEWIODELAY test al,02h ;Send Ok ? jnz short SendSmbusOk0 ;check other status loop short Chk_Status_Final0 SendSmbusOk0: endif; ICH ;R25 ret Disable_ClkGen_For_PIIX4 Endp endif; PIIX_ID ifdef M1543 Disable_ClkGen_For_M1543 Proc near ;(3-b.) write '1' clear to let read index 00h to be "04h" ( Idle ). mov dx,SMBUS_PORT + 00h Chk_Status: mov al,0ffh out dx,al NEWIODELAY NEWIODELAY in al,dx ;get status NEWIODELAY NEWIODELAY ;R13 cmp al,04h ;R13 jne short Chk_Status test al,04h ;R13 jz short Chk_Status ;R13 mov dx, SMBUS_PORT + 03h mov al, 0d2h ;ID (write) out dx, al NEWIODELAY NEWIODELAY mov dx,SMBUS_PORT + 01h mov al,0c0h ;reset pointer & set R/W block mode out dx,al NEWIODELAY NEWIODELAY ;R13 - start mov dx, SMBUS_PORT + 07h mov al, 000h ;set command out dx, al NEWIODELAY NEWIODELAY ;R13 - end ;Programe block num. ;R02 mov si,offset EGROUP:Prg_ClkGen_Num mov si,offset Prg_ClkGen_Num ;R02 mov dx, SMBUS_PORT + 00h mov dl, 04h mov al, cs:[si] out dx, al newiodelay newiodelay ;Programe block data ;R02 mov si,offset EGROUP:Prg_ClkGen_Tbl mov si,offset Prg_ClkGen_Tbl ;R02 ;R03 mov dh,SMBus_Port_HiByte @@: ;R03 mov dl,06h mov dx,SMBUS_PORT + 06h mov al,cs:[si] out dx,al NEWIODELAY NEWIODELAY add si,1 ;R02 cmp si,offset EGROUP:Prg_ClkGen_Tbl_End cmp si,offset Prg_ClkGen_Tbl_End ;R02 jne short @B ;R13 mov dx,SMBUS_PORT + 07h ;R13 mov al,077h ;set command ;R13 out dx,al ;R13 NEWIODELAY ;R13 NEWIODELAY ;R13 mov dx,SMBUS_PORT + 02h mov al,0ffh ;start send out dx,al NEWIODELAY NEWIODELAY ;R09 - start mov dx,SMBus_Port + 0 clc mov cx,01000h Chk_I2C_OK: in al,dx ;get status ;R13 or al,al ;R13 jz short Clear_final ;R13 test al,20h ;Error status test al,60h ;R13;Error status jnz short SMBus_Err ;R13 test al,01h ;busy ? ;R13 jz short Not_Smbusy test al, 010h ;R13;nz, is successful jnz short Clear_final ;R13 ;Wait bus clean push cx mov cx,100h @@: loop short @B pop cx ;R13Not_Smbusy: ;R13 out dx,al loop short Chk_I2C_OK SMBus_Err: ;R13 out dx, al ;R13 NEWIODELAY ;R13 NEWIODELAY ;R13 NEWIODELAY ;R13 in al, dx ;get status ;R13 NEWIODELAY ;R13 NEWIODELAY ;R13 NEWIODELAY ;R13 test al, 20h ;R13 jnz short SMBus_Err Clear_final: ;R09 - end ret Disable_ClkGen_For_M1543 Endp endif; M1543 ;R01 - starts ifdef VT586_ACPI IF VIA_SMBus EQ 0 ;R10 Disable_ClkGen_For_VT586B Proc near extrn Dir_Out:Near extrn Set_Start:Near extrn Wr_Byte:Near extrn Wait_ACK:Near extrn Set_Stop:Near push cx ;R01A push bx ;R01A call Dir_Out call Set_Start ;R01A push cx ;R01A push bx ;R01A - starts mov bl,0D2h ; Slave Address call Wr_Byte ; call Wait_ACK ; ;The following bytes must be sent alough they are "Don't Care" in data sheet. mov bl,0 ; Command Code call Wr_Byte ; call Wait_ACK ; ;R12 mov bl,0 ; Byte Count ;R12 call Wr_Byte ; ;R12 call Wait_ACK ; mov si,offset Prg_ClkGen_Num ;R12 mov bl,byte ptr cs:[si] ;R12 call Wr_Byte ;R12 call Wait_ACK ;R12 ;R01A - ends ;R02 mov si,offset EGROUP:Prg_ClkGen_Num mov si,offset Prg_ClkGen_Num ;R02 xor cx, cx ;R12 mov cl,byte ptr cs:[si] @@: push cx inc si mov bl,byte ptr cs:[si] call Wr_Byte call Wait_ACK pop cx jc SetValuesFail loop short @B call Set_Stop pop bx pop cx clc ret SetValuesFail: pop bx pop cx stc ret Disable_ClkGen_For_VT586B Endp ENDIF; VIA_SMBus ;R10 endif; VT586_ACPI ;R10 - starts if VIA_SMBus Disable_ClkGen_For_VT596 Proc near mov dx,SMBus_Port + 04h mov al,0d2h ;ID (write) out dx,al NEWIODELAY NEWIODELAY mov dx,SMBus_Port + 00h Chk_Status0: in al,dx ;get status NEWIODELAY out dx,al NEWIODELAY or al,al jnz short Chk_Status0 mov dx,SMBus_Port + 02h in al,dx ;reset pointer NEWIODELAY NEWIODELAY ;Programe block num. mov si,offset Prg_ClkGen_Num mov dx,SMBus_Port + 05h mov al,cs:[si] out dx,al newiodelay newiodelay ;Programe block data mov si,offset Prg_ClkGen_Tbl mov dx,SMBus_Port + 07h @@: mov al,cs:[si] out dx,al NEWIODELAY NEWIODELAY add si,1 cmp si,offset Prg_ClkGen_Tbl_End jne short @B ;Start send. mov dx,SMBus_Port + 02h mov al,54h out dx,al newiodelay newiodelay xor cx,cx ;loop count mov dx,SMBus_Port + 00h Chk_Status_Final0: in al,dx ;get status NEWIODELAY test al,02h ;Send Ok ? jnz short SendSmbusOk0 ;check other status loop short Chk_Status_Final0 SendSmbusOk0: ret Disable_ClkGen_For_VT596 Endp endif; VIA_SMBus ;R10 - ends ;R01 - ends if SIS_SMBus Disable_ClkGen_For_SISSMBus Proc near ;R18 - start ifdef Hardware_SMBus_Support ifdef SiS5595_BVersion push cx push bx ;; Set SMBus Address mov dx,ACPI_BASE_IO_ADDR+38h ;SMBus IO index mov al,04h out dx,al NEWIODELAY mov dx,ACPI_BASE_IO_ADDR+39h ;SMBus IO data mov al,0D2h out dx,al NEWIODELAY ;; Set SMBus Command mov dx,ACPI_BASE_IO_ADDR+38h ;SMBus IO index mov al,05h out dx,al NEWIODELAY mov dx,ACPI_BASE_IO_ADDR+39h ;SMBus IO data mov al,00h out dx,al NEWIODELAY mov si,offset Prg_ClkGen_Num xor cx,cx mov cl,byte ptr cs:[si] ;; Set SMBus Bytes Count mov dx,ACPI_BASE_IO_ADDR+38h ;SMBus IO index mov al,07h out dx,al NEWIODELAY mov dx,ACPI_BASE_IO_ADDR+39h ;SMBus IO data mov al,cl out dx,al NEWIODELAY mov bh,08h @@: inc si mov ah,byte ptr cs:[si] mov dx,ACPI_BASE_IO_ADDR+38h ;SMBus IO index mov al,bh out dx,al NEWIODELAY mov dx,ACPI_BASE_IO_ADDR+39h ;SMBus IO data mov al,ah out dx,al NEWIODELAY inc bh loop @b ;; Write Block Data mov dx,ACPI_BASE_IO_ADDR+38h ;SMBus IO index mov al,02h out dx,al NEWIODELAY mov dx,ACPI_BASE_IO_ADDR+39h ;SMBus IO data mov al,1ah out dx,al NEWIODELAY ;; Wait ACK mov dx,ACPI_BASE_IO_ADDR+38h ;SMBus IO index mov al,00h out dx,al NEWIODELAY Wait_SMBus_ACK: mov dx,ACPI_BASE_IO_ADDR+39h ;SMBus IO data in al,dx NEWIODELAY test al,40h jz short Wait_SMBus_ACK out dx,al NEWIODELAY pop bx pop cx endif; SiS5595_BVersion else; Hardware_SMBus_Support ;R18 - end extrn Set_Start:Near extrn Wr_Byte:Near extrn Wait_ACK:Near extrn Set_Stop:Near push cx push bx call Set_Start mov bl,0D2h ; Slave Address call Wr_Byte ; call Wait_ACK ; ;The following bytes must be sent alough they are "Don't Care" in data sheet. mov bl,0 ; Command Code call Wr_Byte ; call Wait_ACK ; ;R11 mov bl,0 ; Byte Count ;R11 call Wr_Byte ; ;R11 call Wait_ACK ; mov si,offset Prg_ClkGen_Num ;R11 mov bl,byte ptr cs:[si] ;R11Byte Count call Wr_Byte ;R11 call Wait_ACK ;R11 mov si,offset Prg_ClkGen_Num xor cx, cx ;R11 mov cl,byte ptr cs:[si] @@: push cx inc si mov bl,byte ptr cs:[si] call Wr_Byte call Wait_ACK pop cx jc SetValuesFail loop short @B call Set_Stop pop bx pop cx clc ret SetValuesFail: pop bx pop cx stc endif; Hardware_SMBus_Support ;R18 ret Disable_ClkGen_For_SISSMBus Endp endif; SIS_SMBus ENDIF; CLKCNTL_KERNEL ECODE ENDS END